Details

The Winners of Innovate Europe Design Contest 2015

      Innovate Europe Design Contest 2015 is the second edition of the Altera European contest. This year, 71 teams from 20 European countries registered the contest (47 in « SoC Design» category, 12 in « OpenCL » category, 12 in « FPGA Design » category). 179 students were involved in the contest. Finally, 32 teams submitted their project (17 in « SoC Design » category, 4 in « OpenCL » category and 11 in « FPGA Design » category).

      25 judges from Industry (ALTERA) and Academia (CNFM) in France reviewed the 32 projects. Each project has been reviewed by 3 persons. The criteria for judging were Complexity, Functionality, Design Implementation and Integrity of Documentation. Lots of projects covered some areas like robotics, computer vision, signal processing … But also new subjects like FPGA for HPC or FPGA in the Cloud.

      The 3 winners are:
        Best Project in "SoC Design": "FPGA in the Cloud: Altera Technologies Boosting Homomorphic Encryption" Stefano Marano, Domenico Argenziano, Alessandro Cilardo, University of Naples, ITALY

        Best Project in "FPGA Design": "Hardware in the Loop (HIL) simulator of a DC machine with a sensor less speed controller", P. Saenger PhD student, H. Cherragui PhD student, A. Safia Master student, M. Bressel PhD student, University of Franche-Comté, Belfort, France

        Best Project in "OpenCL": "Evolutionary-based Image Segmentation of Medical Images using OpenCL" Konrad Derda, Krzysztof Majcher, Roman Segeda, Dorota Oszutowska-Mazurek, Oktawian Knap West-Pomeranian University of Technology Szczecin, Poland

      Category Project Students Advisors School Country
      FPGA design

      Hardware-In-the-Loop simulation of a DC-machine with ALTERA boards

      		 P. Saenger,
      H. Cherragui,
      A. Safia, M. Bressel

      Mickael Hilairet

      University of Franche-Comté, Belfort

      France
      Cyclone V SoC FPGA in the Cloud: Altera Technologies Boosting Homomorphic Encryption Stefano Marano,
      Domenico Argenziano

      Alessandro Cilardo

      University of Naples

      Italy
      OpenCL

      Evolutionary-based Image Segmentation of Medical Images using OpenCL

      Konrad Derda*,
      Krzysztof Majcher*,
      Roman Segeda*,
      Dorota Oszutowska-Mazurek**,
      Oktawian Knap***

      Przemyslaw Mazurek*

      *West-Pomeranian University of Technology Szczecin

      **Higher School of Technology and Economics in Szczecin

      ***Pomeranian Medical University in Szczecin, Chair of Forensic Medicine

      		 Poland

Best Project "FPGA Design"

      Hardware in the Loop (HIL) simulator of a DC machine with a sensor less speed controller

        P. Saenger PhD student, H. Cherragui PhD student, A. Safia Master student, M. Bressel PhD student Advisor: Prof. Dr. M. Hilairet University of Franche-Comté, Belfort, France

         

        HIL simulation provides an effective platform to validate an embedded controller before testing it on a real system. The project under development with 2 PhD students is to design the sensor less controller and simulator of a DC machine.

        The project is as follows:

        Part 1: sensor less speed controller
      • Design in VHDL the PWM (Pulse With Modulation).
      • Design in VHDL the QEP (Quadrature Encoder Pulse) to decode the position of the machine.
      • Design a NIOS processorto implement a speed controller. This program will work with a timer interrupt.
      • Design an observer to estimate the speed and load torque of the machine. Therefore, the simulator needs to send the armature current data to the controller board by an appropriate bus communication.

        • Part 2: DC machine simulator
      • Design in VHDL the half bridge converter
      • Design in VHDL Quadrature Encoder Pulse to code the position of the machine.
      • Design a NIOS processor to implement the dynamical model of the DC machine. This program will work with a timer interrupt.

        • Part 3: Power board
      • Design a half bridge converter to supply power to a real DC machine.

        • Part 4: Communication
      • Implement a user interface in a PC with Matlab to send and receive data from the two. ALTERA board. The data are speed, reference speed, estimated speed, current, load torque, estimated load torque, voltage and send all the 100ms.
      • Design serial or USB interfaces between board and the PC.
      • Design a complementary small interface for fast communication with the controller board based on the Terasic LT24 LCD touch module. For instance, we are going to add a ON/OFF switch to enable or disable the PWM and protect the real machine and converter.

Best Project "SoC"

      FPGA in the Cloud: Altera Technologies Boosting Homomorphic Encryption
      - The Holy Grail of the Cloud: Computing on encrypted data

        Stefano Marano, Domenico Argenziano, Alessandro Cilardo
         
        The FPGA in the Cloud project demonstrates the role of FPGAs as a key enabling technology for securing future Cloud-based applications. In particular, the project designed an accelerator for Homomorphic Encryption (HE), a recently introduced cryptographic technique enabling computation to take place on encrypted data. With HE the computation can be delegated to a third-party service, without disclosing data yet giving the server complete computation capabilities, fully addressing the security concerns raised today by Cloud computing. In fact, HE has a huge potential for enabling new compelling application scenarios in the field of cloud services and beyond, including electronic finance, medical applications, e-voting, etc. However, HE still suffers from prohibitive computational costs.

        The FPGA in the Cloud project is based on a fully homomorphic scheme, building on the integer-based approach first introduced by van Dijk in 2010, as opposed to schemes based on Lattice problems and Learning with Errors. The accelerator was designed to match the potential of the underlying FPGA architecture, relying on highly-customized hardware for integer multiplication and modular reduction on very long operands, in the order of millions of bits. The project defined the architecture of a single node based on an Altera Cyclone V SoC development board. Multiple nodes are assumed to be connected in a hypercube topology fully implementing a HE accelerator, matching the particular data exchange pattern of the underlying FFT computation required by the algorithm. The project also designed a two-dimensional memory subsystem supporting the specific FFT on-chip access patterns and, at the same time, guaranteeing a suitable degree of access parallelism. In addition, we introduced a number of low-level optimizations to further boost performance, which contributed to reaching a considerable speed-up compared to pure software implementations.

        As a future work, we plan to move from the multiple FPGA approach relying on Cyclone V devices to a single-chip solution, targeting a high-end FPGA, like an Altera Stratix V device, as a representative instance of the emerging trends towards special-purpose acceleration in future Cloud Computing.

Best Project in "OpenCL"

        Biomedical images provide us extraordinary and sometimes irreplaceable data. Let us find a lot of anomalies in human body building. We can aid traditional methods with image processing algorithms. Almost the most important task in biomedical image analysis is image segmentation and it is not as simple as usually.

        Biomedical images have a very complex morphological complexity. Development of segmentation algorithm is hard and it requires the use of trial and error method which let us find the best sequence of morphological operations for given image.

        There is a possibility of using optimization algorithm to find the sequence automatically. The main problem of this approach is requirement of processing high resolution images many times which is cumbersome and takes a lot of time when we use usual programming techniques. When high performance computing is considered classical programming techniques are abandoned in favour of parallel processing and hardware acceleration.

        Altera SDK for OpenCL let us bring the processing of biomedical images to the next level and shortens the consumed time thanks to the parallel computing.